发明授权
US07817071B2 Low power consumption analog-to-digital converter 有权
低功耗模数转换器

Low power consumption analog-to-digital converter
摘要:
A low power consumption analog-to-digital converter (ADC) is provided. The switched capacitor circuit and the operational amplifier of the pipelined stage within the present low power consumption ADC are designed to close loop, and the operational amplifier is operated at the incomplete settling of the linear settling, namely, the operational amplifier is not operated at the slew state. Therefore, the pipelined stage would not produce signal dependent distortion, such that the gain error produced by the operational amplifier could be seen as a constant gain error.
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