Invention Grant
US07799647B2 MOSFET device featuring a superlattice barrier layer and method
有权
具有超晶格势垒层和方法的MOSFET器件
- Patent Title: MOSFET device featuring a superlattice barrier layer and method
- Patent Title (中): 具有超晶格势垒层和方法的MOSFET器件
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Application No.: US11831394Application Date: 2007-07-31
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Publication No.: US07799647B2Publication Date: 2010-09-21
- Inventor: Ravindranath Droopad , Matthias Passlack , Karthik Rajagopalan
- Applicant: Ravindranath Droopad , Matthias Passlack , Karthik Rajagopalan
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent Michael Balconi-Lamica
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L31/00

Abstract:
A method of forming a semiconductor structure includes forming a channel layer; forming a superlattice barrier layer overlying the channel layer, and forming a gate dielectric overlying the superlattice barrier layer. The superlattice barrier layer includes alternating first and second layers of barrier material. In addition, the superlattice barrier layer is configured for increasing a transconductance of the semiconductor device by at least a factor of three over a semiconductor device absent such superlattice barrier layer.
Public/Granted literature
- US20090032802A1 MOSFET DEVICE FEATURING A SUPERLATTICE BARRIER LAYER AND METHOD Public/Granted day:2009-02-05
Information query
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