- 专利标题： Electronic device with serial ATA interface and power saving method for serial ATA buses
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申请号： US12398499申请日： 2009-03-05
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公开(公告)号： US07797562B2公开(公告)日： 2010-09-14
- 发明人: Fubito Igari
- 申请人： Fubito Igari
- 申请人地址： JP Tokyo
- 专利权人： Kabushiki Kaisha Toshiba
- 当前专利权人： Kabushiki Kaisha Toshiba
- 当前专利权人地址： JP Tokyo
- 代理机构： Foley & Lardner LLP
- 优先权： JP2003-310361 20030902
- 主分类号： G06F1/00
- IPC分类号： G06F1/00 ; G06F1/32
摘要：
In an electronic device with a serial ATA interface, upon detection of the issue or reception of a preset command, a confirmation device, such as a CPU, confirms the completion of execution of the command. Upon confirming the completion of execution of the command, a controller, which may also be the CPU, controls shifting of the serial ATA interface to a power saving mode.
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