发明授权
US07669034B2 System and method for memory array access with fast address decoder
有权
具有快速地址解码器的存储器阵列访问的系统和方法
- 专利标题: System and method for memory array access with fast address decoder
- 专利标题(中): 具有快速地址解码器的存储器阵列访问的系统和方法
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申请号: US11257932申请日: 2005-10-25
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公开(公告)号: US07669034B2公开(公告)日: 2010-02-23
- 发明人: David R. Bearden , George P. Hockstra , Ravindraraj Ramaraju
- 申请人: David R. Bearden , George P. Hockstra , Ravindraraj Ramaraju
- 申请人地址: US TX Austin
- 专利权人: Freescale Semiconductor, Inc.
- 当前专利权人: Freescale Semiconductor, Inc.
- 当前专利权人地址: US TX Austin
- 代理机构: VanLeeuwen & VanLeeuwen
- 代理商 David G. Dolezal
- 主分类号: G06F12/00
- IPC分类号: G06F12/00
摘要:
A method and data processing system for accessing an entry in a memory array is provided using base and offset addresses without adding the base and offset addresses. PGZO encoding is performed on the address bits of the operands. The PGZO values are evaluated using wordline generators resulting in a plurality of possible memory array entry addresses. In parallel with the PGZO operations, a carry value is generated using other bits in the operands. The result of the carry operation determines which of the possible memory array entries is selected from the memory array.
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