发明授权
- 专利标题: Interposer and stacked chip package
- 专利标题(中): 内插器和堆叠芯片封装
-
申请号: US11446971申请日: 2006-06-06
-
公开(公告)号: US07663245B2公开(公告)日: 2010-02-16
- 发明人: Gwang-Man Lim
- 申请人: Gwang-Man Lim
- 申请人地址: KR Gyeonggi-do
- 专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人地址: KR Gyeonggi-do
- 代理机构: Harness, Dickey & Pierce, PLC
- 优先权: KR10-2005-0113375 20051125
- 主分类号: H01L23/48
- IPC分类号: H01L23/48
摘要:
An interposer may include a base substrate supporting an array of conductive lands. The conductive land may have an identical shape and size. The conductive lands may be provided at regular intervals on the base substrate. The conductive land pitch may be determined such that adjacent conductive lands may be electrically connected by one end of an electric connection member. Alternatively, each conductive land may provide respective bonding locations to which ends of two different electric connection members may be bonded. A stacked chip package may include an interposer that may be fabricated by cutting an interposer to size. In the stacked chip package, electrical connections may be made through the interposer between an upper semiconductor chip and a package substrate, between the upper semiconductor chip and a lower semiconductor chip, and/or between the lower semiconductor chip and the package substrate.
公开/授权文献
- US20070120246A1 Interposer and stacked chip package 公开/授权日:2007-05-31
信息查询
IPC分类: