发明授权
- 专利标题： Semiconductor device for reducing soft error rate with reduced power consumption
- 专利标题（中）： 用于降低功耗的降低软错误率的半导体器件
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申请号： US11450267申请日： 2006-06-12
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公开(公告)号： US07652944B2公开(公告)日： 2010-01-26
- 发明人: Yuichi Iwaya
- 申请人： Yuichi Iwaya
- 申请人地址： JP Kanagawa
- 专利权人： NEC Electronics Corporation
- 当前专利权人： NEC Electronics Corporation
- 当前专利权人地址： JP Kanagawa
- 代理机构： Sughrue Mion, PLLC
- 优先权： JP2005-172710 20050613
- 主分类号： G11C5/14
- IPC分类号： G11C5/14
摘要：
A semiconductor device is composed of a first circuit receiving a first power supply voltage; and a second circuit receiving a second power supply voltage. The second power supply voltage is higher than the first power supply voltage. Such device arrangement is effective for reducing the soft error rate, when the second circuit is more susceptive to a soft error than the first circuit, especially when the second circuit is a memory device.
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