Invention Grant
- Patent Title: Stackable semiconductor package
- Patent Title (中): 可堆叠半导体封装
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Application No.: US11636993Application Date: 2006-12-12
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Publication No.: US07589408B2Publication Date: 2009-09-15
- Inventor: Gwo-Liang Weng , Yung-Li Lu , Cheng-Yin Lee
- Applicant: Gwo-Liang Weng , Yung-Li Lu , Cheng-Yin Lee
- Applicant Address: TW Kaohsiung
- Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee Address: TW Kaohsiung
- Agency: Volentine & Whitt, P.L.L.C.
- Priority: TW95119249A 20060530
- Main IPC: H01L23/02
- IPC: H01L23/02
Abstract:
A stackable semiconductor package includes first and second substrates, a semiconductor device, first wires, a supporting element, and a first molding compound. The semiconductor device is disposed on the first substrate. The second substrate is disposed above the semiconductor device, and the area of the second substrate is larger than that of the semiconductor device. The first wires electrically connect the first and second substrates. The supporting element is disposed between the first and second substrates, and supports the second substrate. Some pads of the second substrate are exposed outside the first molding compound. Therefore, the overhang portion of the second substrate will not shake or sway during wire bonding, and the area of the second substrate can be increased to have more devices thereon. Also, the thickness of the second substrate can be reduced, to reduce the overall thickness of the stackable semiconductor package.
Public/Granted literature
- US20070278640A1 Stackable semiconductor package Public/Granted day:2007-12-06
Information query
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