Invention Grant
US07541252B2 Methods of fabricating a semiconductor device including a self-aligned cell diode
有权
制造包括自对准单元二极管的半导体器件的方法
- Patent Title: Methods of fabricating a semiconductor device including a self-aligned cell diode
- Patent Title (中): 制造包括自对准单元二极管的半导体器件的方法
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Application No.: US11770764Application Date: 2007-06-29
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Publication No.: US07541252B2Publication Date: 2009-06-02
- Inventor: Sung-Ho Eun , Jae-Hee Oh , Jae-Hyun Park , Jung-In Kim , Seung-Pil Ko , Yong-Tae Oh
- Applicant: Sung-Ho Eun , Jae-Hee Oh , Jae-Hyun Park , Jung-In Kim , Seung-Pil Ko , Yong-Tae Oh
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine & Whitt, PLLC
- Priority: KR10-2006-0110549 20061109
- Main IPC: H01L21/20
- IPC: H01L21/20

Abstract:
A method of fabricating a semiconductor device includes forming a conductive layer on a semiconductor substrate, forming an insulating layer on the conductive layer, forming a word line and isolation trenches by patterning the insulating layer and the conductive layer, forming an isolation layer that fills the isolation trenches, forming a cell contact hole in the insulating layer such that the cell contact hole is self-aligned with the word line and exposes the word line, and forming a cell diode in the cell contact hole.
Public/Granted literature
- US20080113469A1 METHODS OF FABRICATING A SEMICONDUCTOR DEVICE INCLUDING A SELF-ALIGNED CELL DIODE Public/Granted day:2008-05-15
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