发明授权
US07519895B2 Channel encoding/decoding apparatus and method using a parallel concatenated low density parity check code
有权
信道编码/解码装置和使用并行级联低密度奇偶校验码的方法
- 专利标题: Channel encoding/decoding apparatus and method using a parallel concatenated low density parity check code
- 专利标题(中): 信道编码/解码装置和使用并行级联低密度奇偶校验码的方法
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申请号: US10988900申请日: 2004-11-15
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公开(公告)号: US07519895B2公开(公告)日: 2009-04-14
- 发明人: Gyu-Bum Kyung , Hong-Sil Jeong , Jae-Yoel Kim
- 申请人: Gyu-Bum Kyung , Hong-Sil Jeong , Jae-Yoel Kim
- 申请人地址: KR
- 专利权人: Samsung Electronics Co., LTD
- 当前专利权人: Samsung Electronics Co., LTD
- 当前专利权人地址: KR
- 代理机构: The Farrell Law Firm, PC
- 优先权: KR10-2003-0080738 20031114
- 主分类号: H03M13/00
- IPC分类号: H03M13/00
摘要:
A channel encoding apparatus using a parallel concatenated low density parity check (LDPC) code. A first LDPC encoder generates a first component LDPC code according to information bits received. An interleaver interleaves the information bits according to a predetermined interleaving rule. A second LDPC encoder generates a second component LDPC code according to the interleaved information bits. A controller performs a control operation such that the information bits, the first component LDPC code which is first parity bits corresponding to the information bits, and the second component LDPC code which is second parity bits corresponding to the information bits are combined according to a predetermined code rate.
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