发明授权
- 专利标题: Method of forming metal wire in semiconductor device
- 专利标题(中): 在半导体器件中形成金属线的方法
-
申请号: US11753543申请日: 2007-05-24
-
公开(公告)号: US07517793B2公开(公告)日: 2009-04-14
- 发明人: Seung Hee Hong , Cheol Mo Jeong , Jung Geun Kim , Eun Soo Kim
- 申请人: Seung Hee Hong , Cheol Mo Jeong , Jung Geun Kim , Eun Soo Kim
- 申请人地址: KR Icheon-si
- 专利权人: Hynix Semiconductor Inc.
- 当前专利权人: Hynix Semiconductor Inc.
- 当前专利权人地址: KR Icheon-si
- 代理机构: Townsend and Townsend and Crew LLP
- 优先权: KR10-2006-0127169 20061213
- 主分类号: H01L21/4763
- IPC分类号: H01L21/4763
摘要:
A method of forming a metal wire in a semiconductor device includes performing a first etching process on an insulating layer formed on a semiconductor substrate to form a trench and an insulating layer pattern, the insulating layer pattern defining the trench. A barrier metal layer is formed over the insulating layer pattern and the trench. A second etching process is performed on the barrier metal layer to expose upper corners of the trench while leaving the trench substantially covered with the barrier metal layer. A metal layer is formed over the barrier metal layer in the trench. A heat treatment process is performed for reflowing the metal layer. The metal layer is planarized.
公开/授权文献
- US20080146023A1 METHOD OF FORMING METAL WIRE IN SEMICONDUCTOR DEVICE 公开/授权日:2008-06-19
信息查询
IPC分类: