Invention Grant
- Patent Title: Dual damascene with via liner
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Application No.: US11048486Application Date: 2005-01-31
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Publication No.: US07387961B2Publication Date: 2008-06-17
- Inventor: Uway Tseng , Alex Huang , Kun-Szu Liu
- Applicant: Uway Tseng , Alex Huang , Kun-Szu Liu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
- Agency: Tung and Associates
- Main IPC: H01L21/4763
- IPC: H01L21/4763

Abstract:
A dual damascene structure with improved profiles and reduced defects and method of forming the same, the method including forming a first dielectric over a conductive area; forming a first dielectric insulator over the first dielectric; forming a first opening in the first dielectric insulator; lining the opening with a second dielectric; forming a second dielectric insulator over the first dielectric insulator; forming a second opening in the second dielectric insulator overlying and communicating with the first opening; and, filling the first and second openings with a conductive material to electrically communicate with the conductive area.
Public/Granted literature
- US20060170106A1 Dual damascene with via liner Public/Granted day:2006-08-03
Information query
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