发明授权
US07259595B2 Circuit and method for detecting frequency of clock signal and latency signal generation circuit of semiconductor memory device with the circuit
失效
用于检测具有电路的半导体存储器件的时钟信号和等待时间信号产生电路的频率的电路和方法
- 专利标题： Circuit and method for detecting frequency of clock signal and latency signal generation circuit of semiconductor memory device with the circuit
- 专利标题（中）： 用于检测具有电路的半导体存储器件的时钟信号和等待时间信号产生电路的频率的电路和方法
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申请号： US11120804申请日： 2005-05-02
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公开(公告)号： US07259595B2公开(公告)日： 2007-08-21
- 发明人: Myeong-O Kim
- 申请人： Myeong-O Kim
- 申请人地址： KR Suwon-si, Gyeonggi-do
- 专利权人： Samsung Electronics Co., Ltd.
- 当前专利权人： Samsung Electronics Co., Ltd.
- 当前专利权人地址： KR Suwon-si, Gyeonggi-do
- 代理机构： MargerJohnson & McCollom, P.C.
- 优先权： KR10-2004-0040326 20040603
- 主分类号： G01R23/02
- IPC分类号： G01R23/02
摘要：
A frequency detection circuit and method of detecting the frequency of a clock signal, and a latency signal generation circuit for a semiconductor memory device that includes the frequency detection circuit. The frequency detection circuit includes a frequency detector and an output controller, which determines whether or not the frequency of the clock signal is higher than a predetermined value. Embodiments of the invention have an increased accuracy, increased efficiency, and a reduced current consumption over conventional art.
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