Invention Grant
- Patent Title: Method and apparatus for preventing loops in a full-duplex bus
- Patent Title (中): 用于防止全双工总线中的环路的方法和装置
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Application No.: US11021337Application Date: 2004-12-21
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Publication No.: US07194564B2Publication Date: 2007-03-20
- Inventor: Jerrold V. Hauck , Colin Whitby-Strevens
- Applicant: Jerrold V. Hauck , Colin Whitby-Strevens
- Applicant Address: US CA Cupertino
- Assignee: Apple Computer, Inc.
- Current Assignee: Apple Computer, Inc.
- Current Assignee Address: US CA Cupertino
- Agency: Gazdzinski & Associates
- Main IPC: G06F15/16
- IPC: G06F15/16 ; H04L12/28

Abstract:
A method and apparatus is disclosed for preventing loops in a full-duplex bus. One method has the acts of: selecting at least two candidates to join said bus; establishing a dominant candidate from one of said at least two candidates; testing for loops in said bus; and joining said dominant candidate if no loops are found in said bus.Another method has the acts of: selecting a plurality candidates to join said bus; establishing at least one dominant candidate; testing for loops in said bus; and joining said at least one dominant candidate if no loops are found in said bus. Alternative embodiments are shown that utilize unique identifiers to facilitate candidate selection and to establish dominance on the bus.
Public/Granted literature
- US20050117528A1 Method and apparatus for preventing loops in a full-duplex bus Public/Granted day:2005-06-02
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