Invention Grant
US07180351B2 Hybrid latch flip-flop 有权
混合锁存器触发器

Hybrid latch flip-flop
Abstract:
A hybrid latch flip-flop is applied to an LCD. The hybrid latch flip-flop includes a negative pulse generation unit, a latch flip-flop, and a buffer unit. The latch flip-flop includes a sampling unit and a hold unit. One feature of the present invention is that fewer transistors are employed in the hybrid latch flip-flop, which gives rise to low power consumption. Another feature of the present invention is that, by employing the negative pulse generation unit of a double edge trigger type, the data processing capacity of the hybrid latch flip-flop is doubled without changing the clock frequency.
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