Invention Grant
- Patent Title: Programmable logic array latch
- Patent Title (中): 可编程逻辑阵列锁存器
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Application No.: US10982018Application Date: 2004-11-05
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Publication No.: US07170316B2Publication Date: 2007-01-30
- Inventor: Sang Hoo Dhong , Brian K. Flachs , Joel A. Silberman , Osamu Takahashi
- Applicant: Sang Hoo Dhong , Brian K. Flachs , Joel A. Silberman , Osamu Takahashi
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Dillon & Yudell LLP
- Agent Robert M. Carwell
- Main IPC: H03K19/177
- IPC: H03K19/177 ; G06F7/38
Abstract:
A programmable logic array (PLA) latch is disclosed. The PLA latch includes a first logic array, a second logic array and only one output latch. The second logic array is coupled to the first logic array. The output latch is coupled to the second logic array.
Public/Granted literature
- US20060097751A1 Programmable logic array latch Public/Granted day:2006-05-11
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