Invention Grant
- Patent Title: Method of improved high K dielectric-polysilicon interface for CMOS devices
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Application No.: US09941827Application Date: 2001-08-29
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Publication No.: US07129128B2Publication Date: 2006-10-31
- Inventor: Ronald A. Weimer
- Applicant: Ronald A. Weimer
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Whyte Hirschboeck Dudek SC
- Main IPC: H01L21/8242
- IPC: H01L21/8242

Abstract:
Methods for forming dielectric layers over polysilicon substrates, useful in the construction of capacitors and other semiconductor circuit components are provided. A self-limiting nitric oxide (NO) anneal of a polysilicon layer such as an HSG polysilicon capacitor electrode, at less than 800° C., is utilized to grow a thin oxide (oxynitride) layer of about 40 angstroms or less over the polysilicon layer. The NO anneal provides a nitrogen layer at the polysilicon-oxide interface that limits further oxidation of the polysilicon layer and growth of the oxide layer. The oxide layer is exposed to a nitrogen-containing gas to nitridize the surface of the oxide layer and reduce the effective dielectric constant of the oxide layer. The process is particularly useful in forming high K dielectric insulating layers such as tantalum pentoxide over polysilicon. The nitridized oxynitride layer inhibits oxidation of the underlying polysilicon layer in a post-treatment oxidizing anneal of the high K dielectric, thus maintaining the oxide layer as a thin layer over the polysilicon layer.
Public/Granted literature
- US20030042526A1 Method of improved high K dielectric-polysilicon interface for CMOS devices Public/Granted day:2003-03-06
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