发明授权
- 专利标题： Semiconductor device, and the method of testing or making of the semiconductor device
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申请号： US10413135申请日： 2003-04-15
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公开(公告)号： US07114110B2公开(公告)日： 2006-09-26
- 发明人: Shuji Kikuchi , Tadanobu Toba , Katsunori Hirano , Yuji Sonoda , Takeshi Wada
- 申请人： Shuji Kikuchi , Tadanobu Toba , Katsunori Hirano , Yuji Sonoda , Takeshi Wada
- 申请人地址： JP Tokyo
- 专利权人： Renesas Technology Corp.
- 当前专利权人： Renesas Technology Corp.
- 当前专利权人地址： JP Tokyo
- 代理机构： Antonelli, Terry, Stout and Kraus, LLP.
- 优先权： JP2002-111735 20020415
- 主分类号： G01R31/28
- IPC分类号： G01R31/28 ; G06F11/00
摘要：
A signature circuit, i.e., a random-number generating circuit, is provided in a memory test apparatus. Also, a signature circuit is provided in each of devices-under-test. This configuration allows the large number of semiconductor integrated-circuit devices to be tested at one time with a high efficiency. This condition realizes a tremendous reduction in the test cost.
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