An integrated circuit (10) includes a central processing unit (12), an instruction cache (14), a data cache (16), and a trace recorder. The central processing unit (12) interacts with the instruction cache (14) and the data cache (16) in order to execute instructions. Information passed between the central processing unit (12), the instruction cache (14), and the data cache (16) not normally available for external analysis may be captured by the trace recorder (20) in response to various triggering events. The information captured by the trace recorder (20) may subsequently be provided to external test equipment in order to analyze the operation of the central processing unit (12) for failure correction.