Invention Grant
- Patent Title: Zero threshold voltage pFET and method of making same
- Patent Title (中): 零阈值电压pFET及其制作方法
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Application No.: US10845835Application Date: 2004-05-14
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Publication No.: US07005334B2Publication Date: 2006-02-28
- Inventor: Jeffrey S. Brown , Chung H. Lam , Randy W. Mann , Jeffery H. Oppold
- Applicant: Jeffrey S. Brown , Chung H. Lam , Randy W. Mann , Jeffery H. Oppold
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Downs Rachlin Martin PLLC
- Main IPC: H01L21/336
- IPC: H01L21/336
Abstract:
A zero threshold voltage (ZVt) pFET (104) and a method of making the same. The ZVt pFET is made by implanting a p-type substrate (112) with a retrograde n-well (116) so that a pocket (136) of the p-type substrate material remains adjacent the surface of the substrate. This is accomplished using an n-well mask (168) having a pocket-masking region (184) in the aperture (180) corresponding to the ZVt pFET. The n-well may be formed by first creating a ring-shaped precursor n-well (116′) and then annealing the substrate so as to cause the regions of the lower portion (140′) of the precursor n-well to merge with one another to isolate the pocket of p-type substrate material. After the n-well and isolated pocket of p-type substrate material have been formed, remaining structures of the ZVt pFET may be formed, such as a gate insulator (128), gate (132), source (120), and drain (124).
Public/Granted literature
- US20040251475A1 Zero threshold voltage pFET and method of making same Public/Granted day:2004-12-16
Information query
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