发明授权
- 专利标题： Specific site backside underlaying and micromasking method for electrical characterization of semiconductor devices
- 专利标题（中）： 半导体器件的电气特性的具体现场背面底层和微掩模方法
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申请号： US10605530申请日： 2003-10-06
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公开(公告)号： US06894522B2公开(公告)日： 2005-05-17
- 发明人: Barbara A. Averill , Terence Kane , Darrell L. Miles , Richard W. Oldrey , John D. Sylvestri
- 申请人： Barbara A. Averill , Terence Kane , Darrell L. Miles , Richard W. Oldrey , John D. Sylvestri
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 代理机构： Cantor Colburn LLP
- 代理商 Lisa U. Jaklitsch
- 主分类号： G01N1/32
- IPC分类号： G01N1/32 ; G01R31/28 ; G01R31/26
摘要：
A method for implementing backside probing of a semiconductor device includes isolating an identified defect area on a backside of the semiconductor device, and milling the identified defect area to an initial depth. Edges of the identified defect area are masked, wherein unmasked semiconductor material, beginning at the initial depth, is etched for a plurality of timed intervals until one or more active devices are reached. The one or more active devices are electrically probed.
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