发明授权
US06819143B1 Input buffer circuit having equal duty cycle 失效
输入缓冲电路具有相等的占空比

  • 专利标题: Input buffer circuit having equal duty cycle
  • 专利标题(中): 输入缓冲电路具有相等的占空比
  • 申请号: US10388138
    申请日: 2003-03-13
  • 公开(公告)号: US06819143B1
    公开(公告)日: 2004-11-16
  • 发明人: Tae-Song Chung
  • 申请人: Tae-Song Chung
  • 主分类号: G01R1900
  • IPC分类号: G01R1900
Input buffer circuit having equal duty cycle
摘要:
An input buffer circuit includes a first differential circuit, a second differential circuit, a pull-up circuit, and a pull-down circuit. An input voltage and a reference voltage are provided to the first and second differential circuits. The first differential circuit detects rising edges of the input voltage and causes the pull-up circuit to quickly drive an output voltage to logic high. The second differential circuit detects falling edges of the input voltage and causes the pull-down circuit to quickly drive the output voltage to logic low.
信息查询
0/0