Invention Grant
US06794263B1 Method of manufacturing a semiconductor device including alignment mark
有权
制造包括对准标记的半导体器件的方法
- Patent Title: Method of manufacturing a semiconductor device including alignment mark
- Patent Title (中): 制造包括对准标记的半导体器件的方法
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Application No.: US10367931Application Date: 2003-02-19
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Publication No.: US06794263B1Publication Date: 2004-09-21
- Inventor: Kong-Soo Lee , Young-Wook Park , Jae-Jong Han , Gi-Hyun Hwang , Kyoung-Seok Kim , Sung-Eui Kim , Seung-Mok Shin
- Applicant: Kong-Soo Lee , Young-Wook Park , Jae-Jong Han , Gi-Hyun Hwang , Kyoung-Seok Kim , Sung-Eui Kim , Seung-Mok Shin
- Priority: KR10-2002-0008804 20020219
- Main IPC: H01L2176
- IPC: H01L2176

Abstract:
A method of inhibiting pit occurrence on a semiconductor substrate during manufacture of a semiconductor device includes forming an isolation using a shallow trench isolation (STI) method in a semiconductor substrate, forming an insulation layer on an entire surface of the semiconductor substrate having the isolation, implanting ions into the semiconductor substrate using the insulation layer as a buffer layer, annealing the semiconductor substrate using a rapid thermal annealing (RTA) process, forming a photoresist layer on the insulation layer and then forming an opening in the photoresist layer to expose an underlayer thereof, forming an align key by etching the underlayer at the opening, and removing the photoresist layer and the insulation layer. Alternatively, the thickness of the insulation layer may be reduced to prevent the occurrence of pits on active areas of the semiconductor substrate.
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