Invention Grant
- Patent Title: Microelectronic fabrication having sidewall passivated microelectronic capacitor structure fabricated therein
- Patent Title (中): 具有在其中制造的侧壁钝化微电子电容器结构的微电子制造
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Application No.: US10170840Application Date: 2002-06-13
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Publication No.: US06734079B2Publication Date: 2004-05-11
- Inventor: Chi-Feng Huang , Shyh-Chyi Wang , Chih-Hsien Lin , Chun-Hon Chen , Tien-I Bao , Syun-Ming Jang
- Applicant: Chi-Feng Huang , Shyh-Chyi Wang , Chih-Hsien Lin , Chun-Hon Chen , Tien-I Bao , Syun-Ming Jang
- Main IPC: H01L2120
- IPC: H01L2120

Abstract:
Within a method for fabricating a microelectronic fabrication, and the microelectronic fabrication fabricated employing the method, there is formed within the microelectronic fabrication a capacitor structure which comprises a first capacitor plate layer having formed thereupon a capacitor dielectric layer in turn having formed thereupon a second capacitor plate layer, wherein each of the foregoing layers having an exposed sidewall to thus form a series of exposed sidewalls. The capacitor structure also comprises a silicon oxide dielectric layer formed passivating the series of exposed sidewalls of the first capacitor plate layer, the capacitor dielectric layer and the second capacitor plate layer a silicon oxide dielectric layer.
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