发明授权
- 专利标题: Dirty tag bits for 3D-RAM SRAM
- 专利标题(中): 3D-RAM SRAM的脏标签位
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申请号: US09861172申请日: 2001-05-18
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公开(公告)号: US06720969B2公开(公告)日: 2004-04-13
- 发明人: Michael G. Lavelle , Ewa M. Kubalska , Yan Yan Tang
- 申请人: Michael G. Lavelle , Ewa M. Kubalska , Yan Yan Tang
- 主分类号: G09G536
- IPC分类号: G09G536
摘要:
An external cache management unit for use with a 3D-RAM frame buffer and suitable for use in a computer graphics system is described. The unit may reduce power consumption within the 3D-RAM by performing partial block write-back according to status information stored in an array of dirty tag bits. Periodic level one cache block cleansing is provided for during empty memory cycles.
公开/授权文献
- US20020171655A1 Dirty tag bits for 3D-RAM SRAM 公开/授权日:2002-11-21
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