There is provided an A/D converter circuit capable of high-speed operation without fluctuation of reference voltage due to comparison operation by high-order comparators influencing voltage level of reference voltage of voltage comparison by low-order comparators. First switches SW11A, SW12A, and SW13A and second switches SW11B, SW12B, and SW13B are arranged between reference voltage terminals (REF) of high-order comparators COMP 11, 12, and 13 and voltage-divided terminals (N1), (N2), and (N3) of ladder-resistance-element array, respectively. Voltage holding capacitance elements C11, C12, and C13 are connected to connection points between the first switches SW11A, SW12A, and SW13A and the second switches SW11B, SW12B, and SW13B. When input voltage VAIN is fetched, the first switches SW11A, SW12A, and SW13A are turned on so as to fetch high-order reference voltage VN1, VN2, and VN3 to the voltage holding capacitance elements C11, C12, and C13. The first switches SW11A, SW12A, and SW13A are turned off whereas the second switches SW11B, SW12B, and SW13B turned so that high-order-reference voltages VN1, VN2, and VN3 are supplied to the high-order comparators COM11, COMP12, and COMP13 for voltage comparison operation.