发明授权
US06353876B1 Cache memory exchange optimized memory organization for a computer system
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缓存内存交换计算机系统的优化内存组织
- 专利标题： Cache memory exchange optimized memory organization for a computer system
- 专利标题（中）： 缓存内存交换计算机系统的优化内存组织
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申请号： US09643431申请日： 2000-08-22
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公开(公告)号： US06353876B1公开(公告)日： 2002-03-05
- 发明人: Paul M. Goodwin , Stephen Van Doren
- 申请人： Paul M. Goodwin , Stephen Van Doren
- 主分类号： G06F1208
- IPC分类号： G06F1208
摘要：
Data coherency in a multiprocessor system is improved and data latency minimized through the use of data mapping “fill” requests from any one of the multiprocessor CPUs such that the information requested is acquired through the crossbar switch from the same memory module to which the “victim” data in that CPU's cache must be rewritten. With such an arrangement rewrite latency periods for victim data within the crossbar switch is minimized and the 'ships crossing in the night' problem is avoided.
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