Invention Grant
US06127089A Interconnect structure with low k dielectric materials and method of
making the same with single and dual damascene techniques
有权
具有低k介电材料的互连结构和使用单镶嵌和双镶嵌技术制作相同的方法
- Patent Title: Interconnect structure with low k dielectric materials and method of making the same with single and dual damascene techniques
- Patent Title (中): 具有低k介电材料的互连结构和使用单镶嵌和双镶嵌技术制作相同的方法
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Application No.: US143105Application Date: 1998-08-28
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Publication No.: US06127089APublication Date: 2000-10-03
- Inventor: Ramkumar Subramanian , Christopher F. Lyons , Uzodinma Okoroanyanwu
- Applicant: Ramkumar Subramanian , Christopher F. Lyons , Uzodinma Okoroanyanwu
- Applicant Address: CA Sunnyvale
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: CA Sunnyvale
- Main IPC: G03F7/075
- IPC: G03F7/075 ; H01L21/311 ; H01L21/768 ; G03C1/76
Abstract:
A damascene structure and method of making the same in a low k dielectric material employs an imageable layer in which the damascene pattern is provided. The imageable layer is a convertible layer that upon exposure to the plasma etch that etches the low k dielectric material, converts the silicon-rich imageble layer into a mask layer containing silicon dioxide, for example. The low k dielectric material is protected from further etching by the mask thus created.
Public/Granted literature
- US5380805A Polyimides, process for the preparation thereof and polyimide resin compositions Public/Granted day:1995-01-10
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