发明授权
- 专利标题： Circuit design methods and tools
- 专利标题（中）： 电路设计方法和工具
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申请号： US572520申请日： 1995-12-14
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公开(公告)号： US5910898A公开(公告)日： 1999-06-08
- 发明人: David L. Johannsen
- 申请人： David L. Johannsen
- 申请人地址： MA Marlboro
- 专利权人： Viewlogic Systems, Inc.
- 当前专利权人： Viewlogic Systems, Inc.
- 当前专利权人地址： MA Marlboro
- 主分类号： G06F7/52
- IPC分类号： G06F7/52 ; G06F17/50
摘要：
A circuit design tool which includes (1) separating structural and functional aspects of components, so as to specify the desired functional behaviour of the component, leaving the actual gate-level design of the component to the design tool; (2) translating a model of the desired logical behaviour of a circuit into a regularized set of functional components to achieve that desired behaviour; (3) verifying structural equivalence between pairs of components; (4) a method for bit-reversing the signal flow in a component; (5) a method for performing arithmetic operations backwards from a natural order; (6) an architecture for a multiplier which is faster and more compact than known multipliers; and (7) a method of translating a logic equation into a netlist of connected logic gates.
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