发明授权
- 专利标题： Redundant decoder utilizing address signal and burst length
- 专利标题（中）： 冗余解码器利用地址信号和突发长度
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申请号： US876293申请日： 1997-06-16
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公开(公告)号： US5905681A公开(公告)日： 1999-05-18
- 发明人: Yoshinori Matsui
- 申请人： Yoshinori Matsui
- 申请人地址： JPX Tokyo
- 专利权人： NEC Corporation
- 当前专利权人： NEC Corporation
- 当前专利权人地址： JPX Tokyo
- 优先权： JPX8-175618 19960614
- 主分类号： G11C11/408
- IPC分类号： G11C11/408 ; G11C11/401 ; G11C11/407 ; G11C29/00 ; G11C29/04 ; G11C7/00
摘要：
The redundancy decoder circuit is capable of receipt of burst length information of address signals for first reading out an address of two addresses to be multi-selected and also judging address to be substituted in accordance with other address to be concurrently read out by means of switching, by the burst length signal, the combination logic of the lower bits of the address already prepared.
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