Invention Grant
- Patent Title: Method of fabricating a bipolar transistor operable at high speed
- Patent Title (中): 制造可高速运行的双极晶体管的方法
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Application No.: US622270Application Date: 1996-03-27
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Publication No.: US5614425APublication Date: 1997-03-25
- Inventor: Koji Kimura , Hiroshi Naruse
- Applicant: Koji Kimura , Hiroshi Naruse
- Applicant Address: JPX Kawasaki
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JPX Kawasaki
- Priority: JPX7-074882 19950331
- Main IPC: H01L29/73
- IPC: H01L29/73 ; H01L21/331 ; H01L29/732 ; H01L29/737 ; H01L21/265
Abstract:
An N type diffusion layer as a collector is formed on a P type silicon substrate, and a field oxide film is formed on this diffusion layer. An MoSi.sub.2 film is formed on this field oxide film and a first opening is formed on those field oxide film and MoSi.sub.2 film to expose the diffusion layer. An N type layer is selectively epitaxially grown only on the bottom of the first opening. A base layer is formed on the N type layer, the side wall of the first opening and the MoSi.sub.2 film. The base layer on the N type layer is formed by epitaxial growth, while the base layer on the side wall of the first opening and the MoSi.sub.2 film is formed in a polycrystalline state. A first silicon oxide film is formed on this based layer. The first silicon oxide film is thinner on the polycrystalline base layer than on the epitaxially grown base layer. The first silicon oxide film is subjected to anisotropic etching to expose only the surface of the epitaxially grown base layer. An N type silicon film as an emitter is selectively grown only on this exposed base layer.
Public/Granted literature
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