Invention Grant
- Patent Title: Volatile memory cell with interface charge traps
- Patent Title (中): 具有界面电荷陷阱的易失性存储单元
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Application No.: US343016Application Date: 1994-11-21
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Publication No.: US5608250APublication Date: 1997-03-04
- Inventor: Alexander Kalnitsky
- Applicant: Alexander Kalnitsky
- Applicant Address: FRX Saint Genis Pouilly
- Assignee: SGS-Thomson Microelectronics S.A.
- Current Assignee: SGS-Thomson Microelectronics S.A.
- Current Assignee Address: FRX Saint Genis Pouilly
- Priority: EPX93420474 19931129
- Main IPC: H01L21/8247
- IPC: H01L21/8247 ; G11C11/39 ; H01L21/8242 ; H01L27/10 ; H01L27/108 ; H01L29/788 ; H01L29/792 ; H01L29/76
Abstract:
A semiconductor device is described, incorporating electron traps at the interface between a semiconductor substrate and a gate dielectric layer of an insulated gate field effect transistor, such device being capable of retaining charge in the electron traps for a certain time, allowing volatile memory circuits to be produced wherein each cell occupies only the area required for a single transistor.
Public/Granted literature
- US6139913A Kinetic spray coating method and apparatus Public/Granted day:2000-10-31
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