An improved self-timed pipeline processor is provided with self-timed data transfer, thereby making it possible to control exclusively the memory reading and memory writing accesses of individual pipeline stages. The self-timed pipeline processor prohibits memory reading during memory writing and vice versa. In addition, the pipeline processor temporarily prevents the transfer of data to a next-accessing pipeline stage when the memory address presently being accessed is the same as the address to be accessed next, thereby preventing malfunction of the processor.