An integrated semiconductor circuit made up of a differential stage which comsists of a differential pair of field effect transistors (10, 11) having outputs (34, 35) which are coupled to the inputs of an output stage or sub-circuit (31, 32, 51, 52) for controlling same, and also including a load circuit (R.sub.4, R.sub.3). The circuit provides smoothing means for smoothing fluctuations of an output impedance of the differential transistor pair (10,11) during switching thereof.