A parallel process controller capable of expandable, parallel operating multi-function control of processes without degradation of performance. The process controller comprises up to N (where N is a positive integer) programmable command memory modules, and also comprises data memory modules, an input/output system, a high speed data bus (N-bus) and a general timing and control unit. Each command memory module performs the functional equivalent of a central processing unit with storage of instruction lines designatable by a user via a programming panel. Each command memory module operates autonomously, without regard to the other command memory modules and cyclically solves each of the user instruction lines in a short, fixed length of time. Each data memory module supplements data storage in the command memory modules. The N-bus is a high speed data bus that cyclically interconnects for a fixed length of time each command memory module during one of N control signals generated by the general timing and control unit, to any of the data memory modules and to the input/output system. During this length of time, the selected command memory module may address, read, or write in any location in any data memory module. An interconnectable programming panel may monitor, program, or control line status indicators for any instruction line within any command module or any line within any data memory module. The programming panel communicates with the controller via a dedicated channel of the input/output system.