Invention Grant
US3664116A Digital clock controlled by voltage level of clock reference signal 失效
数字时钟由电压电平控制的时钟参考信号

Digital clock controlled by voltage level of clock reference signal
Abstract:
A digital clock circuit particularly suited for monolithic integration wherein the counting rate of the clock is variable from a normal to a faster rate in response to the level of a 60 Hz voltage derived from the power line and applied to a single input terminal as a clock reference signal.
Information query
Patent Agency Ranking
0/0