Invention Application
- Patent Title: SYSTEM CACHE OPTIMIZATIONS FOR DEEP LEARNING COMPUTE ENGINES
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Application No.: US18407816Application Date: 2024-01-09
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Publication No.: US20250028650A1Publication Date: 2025-01-23
- Inventor: Neta Zmora , Eran Ben-Avi
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06F12/128
- IPC: G06F12/128 ; G06F12/084 ; G06F12/0895 ; G06N3/044 ; G06N3/045 ; G06N3/063 ; G06N3/084 ; G06N20/00

Abstract:
In an example, an apparatus comprises a plurality of compute engines; and logic, at least partially including hardware logic, to detect a cache line conflict in a last-level cache (LLC) communicatively coupled to the plurality of compute engines; and implement context-based eviction policy to determine a cache way in the cache to evict in order to resolve the cache line conflict. Other embodiments are also disclosed and claimed.
Information query
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