A semiconductor package includes a package substrate including a power pad and a ground pad that are spaced apart from each other in a first horizontal direction, first and second semiconductor chips on the package substrate, the first and second semiconductor chips being stacked in a stepped shape that extends in a second horizontal direction perpendicular to the first horizontal direction, and a plurality of connection wires that electrically connect the package substrate to the first semiconductor chip and/or the second semiconductor chip. The first semiconductor chip includes a plurality of lower option pads. The second semiconductor chip includes a plurality of upper option pads. The plurality of connection wires include a conductive wire that electrically connects at least one of first and second upper chip pads of the second semiconductor chip to at least one of the lower option pads of the first semiconductor chip.