Invention Publication
- Patent Title: METHOD FOR AN INTERNAL COMMAND FROM A PLURALITY OF PROCESSING CORES WITH MEMORY SUB-SYSTEM THAT CACHE IDENTIFIERS FOR ACCESS COMANDS
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Application No.: US18643656Application Date: 2024-04-23
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Publication No.: US20240272967A1Publication Date: 2024-08-15
- Inventor: John Traver , Jay R. Shoen
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: G06F9/54
- IPC: G06F9/54 ; G06F9/38 ; G06F12/02 ; G06F12/084 ; G06F12/0871

Abstract:
Methods, systems, and devices for caching identifiers for access commands are described. A memory sub-system can receive an access command to perform an access operation on a transfer unit of the memory sub-system. The memory sub-system can store an identifier associated with the access command in a memory component and can generate an internal command using a first core of the memory sub-system. In some embodiments, the memory sub-system can store the identifier in a shared memory that is accessible by the first core and can issue the internal command to perform the access operation on the memory sub-system.
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