Invention Publication
- Patent Title: ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF
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Application No.: US18310985Application Date: 2023-05-02
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Publication No.: US20240222250A1Publication Date: 2024-07-04
- Inventor: Jun-Hao FENG , You-Chen LIN
- Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
- Applicant Address: TW Taichung City
- Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
- Current Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
- Current Assignee Address: TW Taichung City
- Priority: TW 1150977 2022.12.30
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L21/48 ; H05K1/11 ; H05K3/46

Abstract:
An electronic package is provided, in which a conductive structure and a reinforced insulation portion are bonded to a dielectric layer, and the reinforced insulation portion is in contact with and abuts against the conductive structure, such that the reinforced insulation portion can support the conductive structure to prevent the conductive structure from cracking when an electronic structure is disposed on the dielectric layer and electrically connected to the conductive structure.
Information query
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