Invention Publication
- Patent Title: COHERENT BLOCK READ FULFILLMENT
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Application No.: US18410554Application Date: 2024-01-11
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Publication No.: US20240202144A1Publication Date: 2024-06-20
- Inventor: Vydhyanathan Kalyanasundharam , Amit P. Apte , Eric Christopher Morton , Ganesh Balakrishnan , Ann M. Ling
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06F13/16
- IPC: G06F13/16 ; G06F3/06

Abstract:
A coherent memory fabric includes a plurality of coherent master controllers and a coherent slave controller. The plurality of coherent master controllers each include a response data buffer. The coherent slave controller is coupled to the plurality of coherent master controllers. The coherent slave controller, responsive to determining a selected coherent block read command is guaranteed to have only one data response, sends a target request globally ordered message to the selected coherent master controller and transmits responsive data. The selected coherent master controller, responsive to receiving the target request globally ordered message, blocks any coherent probes to an address associated with the selected coherent block read command until receipt of the responsive data is acknowledged by a requesting client.
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