- 专利标题: INTEGRATED CIRCUIT WITH BONDWIRE FAULT DETECTION CIRUIT
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申请号: US18194289申请日: 2023-03-31
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公开(公告)号: US20240195412A1公开(公告)日: 2024-06-13
- 发明人: Kashyap BAROT , Kumar Anurag SHRIVASTAVA , Sreeram Nasum S
- 申请人: TEXAS INSTRUMENTS INCORPORATED
- 申请人地址: US TX Dallas
- 专利权人: TEXAS INSTRUMENTS INCORPORATED
- 当前专利权人: TEXAS INSTRUMENTS INCORPORATED
- 当前专利权人地址: US TX Dallas
- 优先权: IN 2241071827 2022.12.13
- 主分类号: H03K17/687
- IPC分类号: H03K17/687
摘要:
A circuit includes a switch and a switch controller. The switch has a first terminal coupled to a voltage supply terminal, a second terminal coupled to a ground terminal and to a first bondwire terminal. The switch controller includes: a first resistor, a second resistor, a capacitor, and a buffer circuit. The first resistor has a first terminal coupled to a second bondwire terminal. The second resistor has a first terminal coupled to the voltage supply terminal and has a second terminal coupled to a second terminal of the first resistor. The capacitor has a first terminal coupled to the ground terminal and to the first bondwire terminal and has a second terminal coupled to second terminals of the first and second resistors. The buffer circuit has a terminal coupled to the second terminal of the capacitor and has an output terminal coupled to the control terminal of the switch.
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