A readout circuit of a single photon avalanche focal plane includes a pixel array circuit, a serial bus circuit, a clock and timing control circuit, a working mode control circuit, a clock generation circuit, temperature sensing circuits, data processing and storage circuits, I/O driving circuits, and a uniformity correction circuit. The pixel array circuit includes pixel unit circuits arranged in an array. The uniformity correction circuit is configured to improve imaging uniformity by performing regional offset adjustment on the pixel array circuit. By adjusting pixels in abnormal areas or a global bias voltage through uniformity correction, a scale of an array of the pixel array circuit is improved, and an SPAD array chip is protected from strong light, so that the readout circuit well meets application scenarios with complex environmental information, high spatial resolution ratio and high imaging frame rate.