Invention Publication
- Patent Title: HETEROGENEOUS METAL LINE COMPOSITIONS FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION
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Application No.: US18381442Application Date: 2023-10-18
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Publication No.: US20240047556A1Publication Date: 2024-02-08
- Inventor: Andrew W. YEOH , Joseph STEIGERWALD , Jinhong SHIN , Vinay CHIKARMANE , Christopher P. AUTH
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H10B10/00 ; H01L21/02 ; H01L21/033 ; H01L21/28 ; H01L21/285 ; H01L21/308 ; H01L21/311 ; H01L21/762 ; H01L21/768 ; H01L21/8234 ; H01L21/8238 ; H01L23/522 ; H01L23/528 ; H01L23/532 ; H01L27/02 ; H01L27/088 ; H01L27/092 ; H01L29/06 ; H01L29/08 ; H01L29/165 ; H01L29/167 ; H01L29/417 ; H01L29/51 ; H01L29/78

Abstract:
Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication and, in particular, 10 nanometer node and smaller integrated circuit structure fabrication and the resulting structures. In an example, an integrated circuit structure includes a first plurality of conductive interconnect lines in and spaced apart by a first ILD layer, wherein individual ones of the first plurality of conductive interconnect lines comprise a first conductive barrier material along sidewalls and a bottom of a first conductive fill material. A second plurality of conductive interconnect lines is in and spaced apart by a second ILD layer above the first ILD layer, wherein individual ones of the second plurality of conductive interconnect lines comprise a second conductive barrier material along sidewalls and a bottom of a second conductive fill material, wherein the second conductive fill material is different in composition from the first conductive fill material.
Information query
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