The present disclosure proposes a method of producing an LTPS TFT array substrate. The method is about stacking of a gate insulating layer and an interlayer insulating layer for providing conditions for formation of a gate trench. In addition, stacking of the gate insulating layer and the interlayer insulating layer is produced with some blocks of forming a hole on the gate insulating layer and the interlayer insulating layer to form a hole pattern, filling the gate trench, and producing gate lines. In this way, the formation of the gate lines and the formation of the hole pattern on the gate insulating layer and the interlayer insulating layer are done using the same mask. The method of the present disclosure reduces the number of masks required compared with the method of the related art, thereby reducing the production costs.