- 专利标题: FAULT-TOLERANT GRAPHICS DISPLAY ENGINE
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申请号: US15721273申请日: 2017-09-29
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公开(公告)号: US20190102861A1公开(公告)日: 2019-04-04
- 发明人: Prashant D. Chaudhari , Michael N. Derr , Arthur J. Runyan
- 申请人: Intel Corporation
- 主分类号: G06T1/60
- IPC分类号: G06T1/60 ; G09G5/395
摘要:
Various techniques for providing a fault-tolerant graphics display engine are disclosed herein. In an example, a machine identifies a buffer under-run at a data buffer (DBUF) of a display engine. The machine adjusts a latency tolerance of the DBUF in response to identifying the buffer under-run. The machine determines that the buffer under-run at the DBUF persists after adjusting the latency tolerance. The machine determines whether a preset correction limit has been reached. If the preset correction limit has not been reached, the machine further adjusts the latency tolerance of the DBUF. If the preset correction limit has been reached, the machine removes, from a visual output associated with the display engine, one or more non-critical display assets.
公开/授权文献
- US10387993B2 Fault-tolerant graphics display engine 公开/授权日:2019-08-20
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