An apparatus is described. The apparatus includes a memory controller to receive data from a memory device. The memory controller includes error checking logic circuitry. The error checking logic circuitry is to receive an error checking code from the memory device. The error checking code is generated within the memory device from the data. The error checking logic circuitry includes circuitry to generate a second version of the error checking code from the data that was received from the memory device and compare the received error checking code with the second version of the error checking code to understand if the data that was received from the memory controller is corrupted.