• 专利标题: FLIP-FLOP CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
  • 申请号: US15695333
    申请日: 2017-09-05
  • 公开(公告)号: US20180076798A1
    公开(公告)日: 2018-03-15
  • 发明人: Kouichi Kanda
  • 申请人: Fujitsu Limited
  • 申请人地址: JP Kawasaki-shi
  • 专利权人: Fujitsu Limited
  • 当前专利权人: Fujitsu Limited
  • 当前专利权人地址: JP Kawasaki-shi
  • 优先权: JP2016-177069 20160909
  • 主分类号: H03K3/356
  • IPC分类号: H03K3/356 H03K5/159
FLIP-FLOP CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要:
A flip-flop circuit includes a data capture circuit that captures data based on a clock, a data hold circuit that holds an output of the data capture circuit based on the clock, and a timing control circuit that controls coupling between the output of the data capture circuit and the data hold circuit based on the clock, when the data capture circuit captures new data based on the clock, the timing control circuit performing control so as to temporarily interrupt the coupling between the output of the data capture circuit and the data hold circuit.
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