Invention Application
- Patent Title: ELECTRICAL INTERCONNECT FOR AN INTEGRATED CIRCUIT PACKAGE AND METHOD OF MAKING SAME
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Application No.: US15618660Application Date: 2017-06-09
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Publication No.: US20170278782A1Publication Date: 2017-09-28
- Inventor: Paul Alan McConnelee , Kevin Matthew Durocher , Scott Smith , Donald Paul Cunningham
- Applicant: General Electric Company
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L21/48 ; H01L23/00 ; H01L23/538

Abstract:
An electrical interconnect assembly for use in an integrated circuit package includes a mounting substrate having a thickness defined between a first surface and a second surface thereof and at least one electrically conductive pad formed on the first surface of the mounting substrate. A metallization layer coats a surface of the at least one electrically conductive pad and is electrically coupled thereto. The metallization layer also coats portion of the first surface of the mounting substrate and extends through at least one via formed through the thickness of the mounting substrate.
Public/Granted literature
- US10068840B2 Electrical interconnect for an integrated circuit package and method of making same Public/Granted day:2018-09-04
Information query
IPC分类: