Invention Application
- Patent Title: ISOLATED III-N SEMICONDUCTOR DEVICES
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Application No.: US15597769Application Date: 2017-05-17
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Publication No.: US20170250272A1Publication Date: 2017-08-31
- Inventor: Naveen Tipirneni , Sameer Pendharkar
- Applicant: Texas Instruments Incorporated
- Main IPC: H01L29/778
- IPC: H01L29/778 ; H01L29/20 ; H01L29/06

Abstract:
A semiconductor device with a substrate, a low defect layer formed in a fixed position relative to the substrate, and a barrier layer comprising III-N semiconductor material formed on the low-defect layer and forming an electron gas in the low-defect layer. The device also has a source contact, a drain contact, and a gate contact for receiving a potential, the potential for adjusting a conductive path in the electron gas and between the source contact and the drain contact. Lastly, the device has a one-sided PN junction between the barrier layer and the substrate.
Information query
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