- 专利标题: PHOTOMASK AND METHOD FOR FABRICATING INTEGRATED CIRCUIT
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申请号: US15436729申请日: 2017-02-17
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公开(公告)号: US20170160633A1公开(公告)日: 2017-06-08
- 发明人: Chun-Yu LIN , Yi-Jie CHEN , Feng-Yuan CHIU , Ying-Chou CHENG , Kuei-Liang LU , Ya-Hui CHANG , Ru-Gun LIU , Tsai-Sheng GAU
- 申请人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 申请人地址: TW Hsinchu
- 专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人地址: TW Hsinchu
- 主分类号: G03F1/42
- IPC分类号: G03F1/42 ; G03F7/038 ; G06F17/50 ; G03F1/36
摘要:
A photomask and method for fabricating an integrated circuit is provided. A design layout is provided, wherein the design layout has a plurality of main features. A plurality of assistant features are added in an assistant region of the design layout to form a first layout, wherein the assistant region has no main feature and a width of the assistant region is larger than five times of a width of the main feature. A plurality of optical proximity correction (OPC) features are added on the first layout to form a second layout. And a photomask is formed according to the second layout.
公开/授权文献
- US09983473B2 Photomask and method for fabricating integrated circuit 公开/授权日:2018-05-29
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